cystech electronics corp. spec. no. : c394n3 issued date : 2012.01.19 revised date : 2015.03.30 page no. : 1/9 MTP3413SN3 cystek product specification p-channel logic level enhancement mode mosfet MTP3413SN3 bv dss -20v i d @v gs =-4.5v, t a =25 c -4.9a v gs= -4.5v, i d =-4.3a 39m v gs= -2.5v, i d =-2.5a 51m r dson(typ) v gs= -1.8v, i d =-2a 75m features ? 1.8v gate rated ? advanced trench process technology ? high density cell design for ultra low on resistance ? pb-free lead plating and halogen-free package equivalent circuit outline ordering information device package shipping MTP3413SN3-0-t1-g sot-23 (pb-free lead plating and halogen-free package) 3000 pcs / tape & reel MTP3413SN3 sot-23 d g gate s g s source d drain environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t1 : 3000 pcs / tape & reel,7? reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c394n3 issued date : 2012.01.19 revised date : 2015.03.30 page no. : 2/9 MTP3413SN3 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds -20 v gate-source voltage v gs 12 v continuous drain current @t a =25 c, v gs =-4.5v i d -4.9 a continuous drain current @t a =70 c, v gs =-4.5v i d -3.9 a pulsed drain current (note 1&2) i dm -35 a maximum power dissipation @t a =25 c 1.38 maximum power dissipation @t a =70 c p d 0.88 w operating junction and storage temperature tj, tstg -55~+150 c 2. pulse width 300 s, duty cycle 2% note : 1. pulse width limited by maximum junction temperature. thermal performance parameter symbol limit unit thermal resistance, junction-to-ambient (note) rth,ja 90 c/w note : surface mounted on 1 in2 copper pad of fr-4 board, 270 c/w when mounted on minimum copper pad. electrical characteristics (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss -20 - - v gs =0v, i d =-250a v gs(th) -0.4 - -1.0 v v ds =v gs , i d =-250a i gss - - 100 na v gs =12v, v ds =0v - - -1 v ds =-20v, v gs =0v i dss - - -10 a v ds =-20v, v gs =0v, tj=55 c - 39 50 v gs =-4.5v, i d =-4.3a - 51 65 v gs =-2.5v, i d =-2.5a *r ds(on) - 75 100 m v gs =-1.8v, i d =-2.0a dynamic ciss - 1220 - coss - 103 - crss - 92 - pf v ds =-10v, v gs =0v, f=1mhz *t d(on) - 12.5 - *t r - 12 - *t d(off) - 70 - *t f - 20 - ns v ds =-10v, i d =-1a, v gs =-4.5v, r d =10 , r g =6 *qg - 10 - *qgs - 1.9 - *qgd - 2.7 - nc v ds =-10v, i d =-4.3a, v gs =-4.5v
cystech electronics corp. spec. no. : c394n3 issued date : 2012.01.19 revised date : 2015.03.30 page no. : 3/9 MTP3413SN3 cystek product specification source-drain diode *i sd - - -1.3 *i sm - - -35 a *v sd - -0.76 -1 v v gs =0v, i s =-1.3a *trr - 23 - ns *qrr - 8.5 - nc i s =-1.3a, v gs =0v, di/dt=100a/s *pulse test : pulse width 300s, duty cycle 2% recommended soldering footprint
cystech electronics corp. spec. no. : c394n3 issued date : 2012.01.19 revised date : 2015.03.30 page no. : 4/9 MTP3413SN3 cystek product specification typical characteristics typical output characteristics 0 5 10 15 20 012345 -v ds , drain-source voltage(v) -i d , drain current (a) -v gs =1.5v -v gs =1.8v 5v 4.5 v 4v 3.5 v 3v 2.5 v brekdown voltage vs ambient temperature 20 22 24 26 28 30 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -bv dss , drain-source breakdown voltage (v) i d =-250 a, v gs =0v static drain-source on-state resistance vs drain current 10 100 1000 0.001 0.01 0.1 1 10 -i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =-10v v gs =-1.8v v gs =-4.5v v gs =-2.5v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 024681 -i dr , reverse drain current (a) -v sd , source-drain voltage(v) 0 tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 20 40 60 80 100 120 140 160 180 200 024681 0 drain-source on-state resistance vs junction tempearture 20 30 40 50 60 70 80 90 100 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds(on) , static drain-source on-state resistance(m) v gs =-1.8v, i d =-2a v gs =-4.5v, i d =-4.3a v gs =-2.5v , i d =-2.5a -v gs , gate-source voltage(v) r ds( on) , static drain-source on- state resistance(m) i d =-4.3a i d =-2.5a i d =-0.2a
cystech electronics corp. spec. no. : c394n3 issued date : 2012.01.19 revised date : 2015.03.30 page no. : 5/9 MTP3413SN3 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 10000 0.1 1 10 100 -v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.2 0.3 0.4 0.5 0.6 0.7 0.8 -60 -40 -20 0 20 40 60 80 100 120 140 160 tj, junction temperature(c) -v gs( th) ,threshold voltage-(v) i d =-250 a forward transfer admittance vs drain current 0.01 0.1 1 10 0.001 0.01 0.1 1 10 -i d , drain current(a) g fs , forward transfer admittance-(s) v ds =-10v pulsed ta=25c gate charge characteristics 0 2 4 6 8 10 0 2 4 6 8 10 12 14 16 18 qg, total gate charge(nc) -v gs , gate-source voltage(v) v ds =-10v i d =-4.3a maximum safe operating area 0.01 0.1 1 10 100 0.01 0.1 1 10 100 -v ds , drain-source voltage(v) -i d , drain current (a) dc 10ms 100ms 1ms 100 s t a =25c, tj=150c v gs =-4.5v single pulse 10 s maximum drain current vs junctiontemperature 0 1 2 3 4 5 6 25 50 75 100 125 150 175 tj, junction temperature(c) i d , maximum drain current(a) t a =25c, v gs =-4.5v
cystech electronics corp. spec. no. : c394n3 issued date : 2012.01.19 revised date : 2015.03.30 page no. : 6/9 MTP3413SN3 cystek product specification typical characteristics(cont.) power derating curve 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 0 20 40 60 80 100 120 140 160 t a , ambient temperature() p d , power dissipation(w) mounted on fr-4 board with 1 in 2 p ad area transient thermal response curves 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 t 1 , square wave pulse duration(s) r(t), normalized effectivetransient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *r ja (t) 4.r ja =270 c/w
cystech electronics corp. spec. no. : c394n3 issued date : 2012.01.19 revised date : 2015.03.30 page no. : 7/9 MTP3413SN3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c394n3 issued date : 2012.01.19 revised date : 2015.03.30 page no. : 8/9 MTP3413SN3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c394n3 issued date : 2012.01.19 revised date : 2015.03.30 page no. : 9/9 MTP3413SN3 cystek product specification sot-23 dimension inches 3-lead sot-23 plastic surface mounted package cystek package code: n3 te 13 marking: h j k d a l g v c b 3 2 1 s style: pin 1.gate 2.source 3.drain millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.1102 0.1204 2.80 3.04 j 0.0032 0.0079 0.08 0.20 b 0.0472 0.0669 1.20 1.70 k 0.0118 0.0266 0.30 0.67 c 0.0335 0.0512 0.89 1.30 l 0.0335 0.0453 0.85 1.15 d 0.0118 0.0197 0.30 0.50 s 0.0830 0.1161 2.10 2.95 g 0.0669 0.0910 1.70 2.30 v 0.0098 0.0256 0.25 0.65 h 0.0000 0.0040 0.00 0.10 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0 important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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